今天给大侠带来FPGA设计中Zynq学习笔记,做硬件的第一个实例,一般当然是LED点灯啦,话不多说,上货。
硬件:ZedBoard
软件:ISE 14.7
1、新建工程
2、选择平台
3、新建完成后,输入如下代码:
代码语言:javascript复制`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company:
// Engineer:
//
// Create Date:
// Design Name:
// Module Name: main
// Project Name:
// Target Devices:
// Tool versions:
// Description:
//
// Dependencies:
//
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
//////////////////////////////////////////////////////////////////////////////////
module main(
input clk,
output reg [7:0] led = 8'h01
);
reg[31:0] cnt = 0;
reg clk_buf = 0;
reg direction = 0;
always@(posedge clk) begin
if (cnt==32'd10000000) begin
clk_buf <= !clk_buf;
cnt <= 0;
end
else begin
cnt <= cnt 1;
end
end
always@(posedge clk_buf) begin
// direction control
if (led==8'h80) begin
direction = 1'b1;
end else if (led==8'h01) begin
direction = 1'b0;
end
// shift
if (direction==1'b0) begin
led <= {led[6:0], 1'b0}; // shift left
end else if (direction==1'b1) begin
led <= {1'b0,led[7:1]}; // shift right
end
end
endmodule
4、添加如下的UCF文件:
代码语言:javascript复制# "LD0"
NET "led[0]" LOC = T22;
NET "led[0]" IOSTANDARD = LVCMOS33;
# "LD1"
NET "led[1]" LOC = T21;
NET "led[1]" IOSTANDARD = LVCMOS33;
# "LD2"
NET "led[2]" LOC = U22;
NET "led[2]" IOSTANDARD = LVCMOS33;
# "LD3"
NET "led[3]" LOC = U21;
NET "led[3]" IOSTANDARD = LVCMOS33;
# "LD4"
NET "led[4]" LOC = V22;
NET "led[4]" IOSTANDARD = LVCMOS33;
# "LD5"
NET "led[5]" LOC = W22;
NET "led[5]" IOSTANDARD = LVCMOS33;
# "LD6"
NET "led[6]" LOC = U19;
NET "led[6]" IOSTANDARD = LVCMOS33;
# "LD7"
NET "led[7]" LOC = U14;
NET "led[7]" IOSTANDARD = LVCMOS33;
# "GCLK"
NET "clk" LOC = Y9;
NET "clk" IOSTANDARD = LVCMOS33;
5、编译,下载
END
后续会持续更新,带来Vivado、 ISE、Quartus II 、candence等安装相关设计教程,学习资源、项目资源、好文推荐等,希望大侠持续关注。
大侠们,江湖偌大,继续闯荡,愿一切安好,有缘再见!